• unknown (b.)

Bio/Description

A computer architect at Cray Research, Inc., Silicon Graphics, Inc. (SGI), and Cray, Inc. he was also a Principal Engineer at Google, and Senior Vice President and Chief Technology Officer at NVIDIA’S Tesla Business Unit. He is a graduate of the University of Wisconsin–Madison, where he received a B.S. degree in Electrical and Computing Engineering, an M.S. degree in Computer Science and a Ph.D. in Computer Architecture in 1992 where he was a Wisconsin Research Foundation Alumni and Hertz Foundation Fellow. From July 1992 to June 1996, he served as Sr. Architecture Engineer at Cray Research, Inc. and at Silicon Graphics, Inc. he was Principal Engineer & Chief Engineer from June 1996 to March 2000. He then joined Cray Inc. in 2000 as Corporate Scientist and Chief Architect and then in 2004, he served as Senior Vice President & Chief Technology Officer (CTO) until October 2004. In November 2004 he joined NVIDIA as its Senior Vice President & Chief Technology Officer (CTO) of the Tesla business unit. In August 2011 he became the Principal Engineer of the Platforms Group at Google, and in September 2014 he returned to Cray Inc. as its Senior Vice President & Chief Technology Officer (CTO). The holder of 27 U.S. patents in the areas of interconnection networks, processor micro architecture, cache coherence, synchronization mechanisms and scalable parallel architectures, he was one of the architects of the revolutionary Cray T3E multiprocessor. His focus was on the interconnect, synchronization and communication mechanisms. He was also the Chief Architect of the GigaRing system area network used in three Cray mainframes, the J90, T90 and T3E. He was the Chief Architect of the Cray X1 and X1E supercomputers, combining high performance vector processors with a scalable, globally-addressable system architecture. In addition, he was the Chief Architect of the next generation Cray "BlackWidow" system which achieved superior sustained application performance with faster clock speeds, higher bandwidth and greater scalability. He was also the architect of the router used in the Red Storm system at Sandia National Laboratories and the Cray XT3 MPP. He also led the Cray Cascade project, which was part of the DARPA High Productivity Computing Systems program targeting productive, trans-petaflop systems. In 2011 after 19 years at Cray, he joined NVIDIA as Chief Technology Officer (CTO) of its Tesla™ business unit, responsible for the Tesla roadmap and architecture. He has served as an associate Editor for the IEEE Transactions on Parallel and Distributed Systems. In 2005 he received both the ACM Maurice Wilkes Award and the IEEE Seymour Cray Computer Engineering Award, "For advancing supercomputer architecture through the development of the Cray T3E, the Cray X-1 and the Cray "Black Widow".
  • Noted For:

    An expert in high performance computer architecture and interconnection networks
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