Mr. Robert B. Garner

He manages the team At IBM?s Almaden Research Center (ARC) that is responsible for the core of IBM?s clustered General Parallel File System (GPFS). This team is responsible for the architecture, design, delivery, and support of new GPFS functionality and features, improving performance, and enhancing reliability. Prior to this he managed the GPFS Native RAID (GNR) team that designed and delivered a ?declustered RAID? software storage controller that directly manages disk devices, reducing the overhead of disk rebuild and providing high reliability and data integrity. GNR was first introduced on the Power 775 in 2011 and is now available as the GPFS Storage Server (GSS) using conventional System x servers. He joined ARC in 2001to co-design the IceCube hardware prototype, an innovative dense, 3D, brick-based, fail-in-place, combined compute, storage, and switch server, demonstrated in 2005. He has designed and managed compute, network and storage systems in Silicon Valley for in both product development and research since 1977. He began at Xerox?s Systems Development Division (SDD) and moved to the Xerox Palo Alto Research Center (PARC) in 1981. He joined Sun Microsystems in 1984, and after 14 years at Sun, he joined Brocade Communications in 1998. He was on the products and design teams for the Xerox STAR 8010 Professional Workstation, including first 10-mbps Ethernet NIC in1981.; the SPARC architecture and Sun?s first SPARC hardware (Sun-4/200 workstation) in 1987; the ASIC design for Sun?s first multiprocessor server (SPARCCenter-2000) in 1992; architecture, logic and CAD design teams for Sun?s first 64-bit microprocessor (UltraSPARC-I) in 1994; architecture and design team for Sun?s multi-threaded, dual-core, (VLIW) microprocessor (MAJC) in 1999; the software team for Sun?s Java distributed software platform (JINI) in 1998; and was on the ASIC and hardware design team for Brocade?s Silkworm 2000 & 3000 FibreChannel switches. Since 2004, he has led a team of volunteers at the Computer History Museum in Mountain View which has restored two classic 50-year-old IBM 1401 Data Processing Systems. Among publications he has authored or co-authored are: Early Popular Computers, 1950 ? 1970, IEEE Global History Network, 2012; Tales of CISC and RISC from Xerox PARC and Sun in 2011; The Legendary IBM 1401 Data Processing System, with R. Dill Solid-State Circuits Magazine, IEEE 2(1), 28--39, IEEE, 2010; IBM 1401: The Legendary Data Processing System, with D Spicer and M Wichary MagCloud in 2009; IBM 1401 System 50th Anniversary Event, with F Underwood, C Branscomb, S Jacobs Computer History Museum, in 2009; Reliability of modular mesh-connected intelligent storage brick systems, with C Fleiner, JL Hafner, KK Rao, DR Kenchammana-Hosekote, WW Wilcke, JS Glider IBM journal of research and development 50(2.3), 199--208, IBM, 2006; IBM intelligent bricks project?petabytes and beyond, with Winfried W Wilcke, Claudio Fleiner, Richard F Freitas, Richard A Golding, Joseph S Glider, Deepak R Kenchammana-Hosekote, James Lee Hafner, K Moidin Mohiuddin, KK Rao, IBM journal of research and development 50(2.3), 181--197, IBM, in 2006; Quantitative Study of the Performance and Reliability of a Resilient 3-D Mesh-based Server, with C. Fleiner, D.R.K. Hosekote, and W. Wilcke, Technical Report, Technical Report RJ 10308, IBM Research in 2003; Percolation in dense storage arrays, with S. Kirkpatrick, W.W. Wilcke, and, H. Huels, Physica A: Statistical Mechanics and its Applications 314(1), 220--229, Elsevier in 2002; Celebrating Chips and Architectures [Guest Editor's Introduction], with W. Wilcke, Micro, IEEE 17(2), 9--10, IEEE in 1997; The picoJAVA Microprocessor Core Architecture, Microprocessor Forum, 9th Annual, MicroDesign Resources in 1996; Microprocessors: The Next 15 Years, Symposium on VLSI Technology, VLSI Workshop in 1996; and The SPARC Architecture Manual (Version 8), with D Weaver, et al Prentice-Hall in1992. He is named on several patents.