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  • 2006

Hardware Description

Built upon the functionality and the capability of the 5000V (Blackford-VS) chipset, the X7DVL-i motherboard provides the performance and feature set required for dual processor-based servers with configuration options optimized for communications, presentation, storage, computation or database applications. The 5000V (Blackford-VS) chipset supports a single or dual Intel Xeon 5100/5000 Series 64-bit dual core processor(s) with front side bus speeds of up to 1.333 GHz. T The chipset consists of the 5000V (Blackford-VS) Memory Controller Hub (MCH), and the Enterprise South Bridge 2 (ESB2). The 5000V (Blackford-VS) MCH chipset is designed for symmetric multiprocessing across two independent front side bus interfaces. Each front side bus uses a 64- bit wide, 1333 MHz data bus that transfers data at 10.7 GB/sec. The MCH chipset connects up to six Fully Buffered DIMM modules, providing a total memory size of up to 16 GB. The MCH chipset also provides one x8 PCI-Express interface to the ESB2. In addition, the 5000V (Blackford-VS) chipset offers a wide range of RAS features, including memory interface ECC, x4/x8 Single Device Data Correction, CRC, parity protection, memory mirroring and memory sparing.