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A Professor for Software Engineering and Real-Time Systems at the Vienna University of Technology since 1982, he received his Ph.D. in Physics "sub auspiciis praesidentis" from the University of Vienna, Austria in 1968. After a two-year period as a Post Doc and Assistant Professor at the University of Georgia in Athens, GA, he joined Voest Alpine in Linz, Austria in 1970; serving as a Manager of the Computer Process Control Department from 1972-1978. In 1978 he accepted an appointment as a Professor for Computer Process Control at the Technical University of West-Berlin. His research interests focus on the intersection of real-time systems, fault-tolerant systems, and distributed embedded systems which evolved out of the MARS project at the Vienna University of Technology. He is the chief architect of the Time-Triggered Protocol and the Time-Triggered Architecture (TTA) which evolved over twenty-five years of research and provides a computing infrastructure for the design and implementation of dependable distributed embedded systems. In 1998, he co-founded the company, TTTech, a computer network technology for safety-related applications primarily in transportation industries and industrial automation." He was the Chairman of the IFIP WG 10.4 on Dependable Computing and Fault-Tolerance from 1996 to 1998. In 1998 he was elected to become a full member of the Austrian Academy of Science. In July 2000 he was nominated by the Austrian Government to become one of the eight scientists to advise the Austrian Government on Science Policy; a position he held until 2005. He is the recipient of many awards including: the 2005 Wilhelm Exner Medal; the IEEE Computer Society 2003 Technical Achievement Award Recipient, "For outstanding contributions to the field of safety-critical real-time computing"; in 2007 he received the "Docteur honoris causa" from the Universitè Paul Sabatier, Toulouse; and in December 2007 he was awarded the Technical Achievement Award of the IEEE TC on Real-Time Systems. In addition, from 1990 to 1992 he was Chairman of the IEEE Technical Committee on Fault-Tolerant Computing and in 1994 he was named an IEEE Fellow for contributions to fault-tolerant, real-time systems. For the period 2007 to 2009 he was a member of the IST Advisory Group, the Advisory Group for the ICT theme in FP7. He serves as Chairman for the Scientific Board of the Embedded Systems Institute (Eindhoven, NL) and for the Scientific Board of ARC (Seibersdorf, A). Most recently, he and his research group work in the field of automotive and aerospace electronics. He is presently involved in two large EC funded research projects, namely the FP6 Integrated Project DECOS and the FP6 Network of Excellence ARTIST2. He holds more than twenty patents in the area of dependable real-time systems and his ideas have been taken up by a wider academic and industrial research community and gave rise to the development of the field of time-triggered real-time systems. He published a widely used textbook on Real-Time Systems and more than 100 papers on the topic of embedded systems.
Noted For:Chief architect of the Time-Triggered Protocol and the Time-Triggered Architecture
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